So I’m doing a Z80 based computer, as any Nerd should 🙂
The specs:
| CPU | Z80A @ 4MHz |
| ROM | 8 KB |
| RAM | 8 KB (Expandable to 64 KB) |
| I/O: | |
| Serial | SIO/2 with CTC controlled BAUD rate on individual channels. |
| O/S | TBA (ROM Monitor, Basic and/or CP/M) |
Current status:
CPU, RAM, ROM and CTC implemented and fully working.
Upcoming (Soon):
- SIO/2 to be implemented and tested.
- ROM Monitor to be written.
Upcoming (Later):
- Additional hardware.
- BASIC in ROM.
- More RAM (min. 20 KB)
- ROM Disable mechanism for CP/M.
- Mass Storage (Tape, Disk)
- CP/M Bios and friends.
Design Philosophy:
Most Z80 projects use “modern” components, i.e. large S-RAMs and Microcontrollers for handling various tasks. I’ve decided to use only components that would have been available in the days of the Microcomputer – late seventies to early eighties – the CPU for example is 1983 vintage. The most modern component I’ve used so far is a Lattice 16V8 GAL for I/O Decoding and an Atmel 28C64B EEPROM for the ROM, for ease of development, that one WILL be replaced with a proper 2764 when done.
Implementation
All circuitry has been done with point-to-point soldered Wire-wrap wire on IC-friendly stripboard (This kind.) The “Mainboard” contains the CPU (Z80A), ROM, and RAM (U6264 S-RAM), Reset circuitry (T7705 Supply-Voltage Monitor), Clock and Glue Logic (74LS series components.) The I/O board is connected thru an “I/O Bus” by a 34 pin ribbon cable. The I/O Board has the CTC and SIO/2 with Address decoding provided by a Lattice 16V8 GAL. The Serial port Layout is pretty much the one found in the Regnecentralen RC702 “Piccolo.” (I prefer the RC Piccoline, but that was a 80186 machine.)